Starting Date: Summer 2026
Prerequisites: Interest in programming languages
Will results be assigned to University: No
Verilog is the most used hardware-description language: it is the primary language in which chips—from small microcontrollers to large SoCs and AI accelerators—are designed, simulated, and verified before being committed to silicon.
Despite Verilog’s centrality in hardware development, its semantics is surprisingly poorly understood and the language is known for its many quirks. My recent paper “The Simulation Semantics of Synthesisable Verilog” (OOPSLA’25) demonstrates the Verilog standard that is supposed to specify the semantics of the language is inconsistent both with itself and with Verilog practice.
One initiative meant to help clarify and explain the semantics of Verilog, introduced in the above-mentioned paper, is the tool VV (short for “Verilog visualiser”). The tool is an interactive web-based simulator that visualises important components of the execution of Verilog designs, critically, the Verilog event queue, which keeps track of the events to be executed (such as an update to a register or a clock tick). The tool lets users explore different event schedules by interactively choosing which event to execute next.
Proposal
VV’s visualisation is currently quite limited: it visualises one event schedule at a time and exploring different event schedules is only possible by restarting from the beginning of execution.
This project is meant to address the above limitations. The aim of this project is to extend VV into a multiverse debugger for Verilog, a powerful debugging technique which has yet to be applied to hardware-description languages. In more detail, multiverse debugging, introduced by Torres Lopez et al. (ECOOP’19) and extended in follow-up work such as Lauwaerts et al. (OOPSLA’25), is a debugging technique for exploring all execution paths of a non-deterministic program (or, in the case of Verilog, a hardware description). Rather than stepping through one path, a multiverse debugger constructs a tree of universes and provides operations—multiverse breakpoints, stepping, reductions—to navigate it.
Prerequisites
This project sits at the intersection of programming languages, digital design, and visualisation, so a range of skills are relevant.
Most important is an interest in compilers, interpreters, and language implementation and similar topics. Client-side web development skills will also be useful since VV is a web application. On top of this, functional programming experience will be helpful since VV is written in ReScript, a functional reimagination of JavaScript.
Basic knowledge of Verilog and digital logic is a plus but not expected.
Lastly, visualisation experience would be valuable, since a key goal is a good interactive visualisation of the universe tree of the multiverse debugger.
References
– A. Lööw. “The Simulation Semantics of Synthesisable Verilog.” OOPSLA, 2025.
– C. Torres Lopez et al. “Multiverse Debugging: Non-Deterministic Debugging for Non-Deterministic Programs.” ECOOP, 2019.
– T. Lauwaerts et al. “MIO: Multiverse Debugging in the Face of Input/Output.” OOPSLA, 2025.